Ripple Carry Adder Simulator
Simulate binary addition through a chain of full-adder stages. Watch the carry move from the least significant bit toward the most significant bit and inspect each stage’s A bit, B bit, carry-in, sum bit and carry-out.
What Is a Ripple Carry Adder?
A ripple carry adder is a multi-bit binary adder created by connecting multiple full adders in sequence. Each full-adder stage adds one bit from operand A, one bit from operand B and the carry received from the previous stage.
Its carry-out becomes the carry-in of the next more significant full adder. Because this dependency progresses through the circuit one stage at a time, the carry is described as rippling through the adder.
Ripple carry adders are commonly studied in digital electronics, Boolean logic, computer architecture and hardware design because they provide one of the clearest ways to understand multi-bit binary addition.
How a Full Adder Works
Full Adder Inputs
Each stage receives three binary inputs: the A bit, B bit and incoming carry from the previous stage.
Bᵢ
Cᵢ
Full Adder Outputs
Each stage generates a sum bit and a carry-out that becomes the next stage’s carry-in.
Cᵢ₊₁
Ripple Carry Adder Formulas
Sum Formula
Carry-Out Formula
Full Adder Truth Table
| A | B | Carry-In | Sum | Carry-Out |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
Worked Example: 1011 + 0110
B = 0110
Initial carry = 0
1011 binary = 11 decimal
0110 binary = 6 decimal
11 + 6 = 17
Binary result = 10001
Low 4-bit sum = 0001
Final carry = 1
Worked Example: Carry Ripples Through Several Stages
B = 0001
C0 = 0
Stage 0: 1 + 1 + 0 → Sum 0, Carry 1
Stage 1: 1 + 0 + 1 → Sum 0, Carry 1
Stage 2: 1 + 0 + 1 → Sum 0, Carry 1
Stage 3: 0 + 0 + 1 → Sum 1, Carry 0
Final result = 1000
4-Bit Ripple Carry Adder Structure
| Stage | Inputs | Carry-In | Outputs |
|---|---|---|---|
| FA0 | A0, B0 | C0 | S0, C1 |
| FA1 | A1, B1 | C1 | S1, C2 |
| FA2 | A2, B2 | C2 | S2, C3 |
| FA3 | A3, B3 | C3 | S3, C4 |
Ripple Carry Propagation Delay
The main limitation of a ripple carry adder is the dependency between adjacent full-adder stages. A higher-order stage may need to wait logically for the carry produced by the previous stage.
A carry generated at the least significant bit can therefore travel through many stages before the final output becomes known.
This simulator shows the logical carry path. It does not estimate physical propagation time because actual hardware delay depends on gates, wiring and implementation technology.
Ripple Carry Adder vs Carry Lookahead Adder
| Feature | Ripple Carry | Carry Lookahead |
|---|---|---|
| Carry calculation | Stage to stage | Generate and propagate logic |
| Design complexity | Simple | More complex |
| Carry dependency | Sequential chain | More parallel |
| Logic requirement | Lower | Higher |
| Speed as width increases | Generally slower | Generally faster |
Important Ripple Carry Adder Notes
Its carry-out becomes the carry-in of Stage 1, and that relationship continues until the most significant full-adder stage.
The calculator treats A and B as unsigned binary operands.
If the final carry is 1, the complete unsigned result requires one more bit than the selected adder width.