LFSR Binary Sequence Tool

LFSR Simulator

Simulate a Linear Feedback Shift Register using a custom binary seed and XOR tap positions. Generate register states step by step, inspect feedback and output bits, and detect when the LFSR sequence repeats.

Linear Feedback Shift Register XOR Feedback Custom Taps Left / Right Shift Cycle Detection Period Analysis

Linear Feedback Shift Register Simulator Fibonacci LFSR

Initial Seed Binary seed. Its length determines the register width.

Tap Positions Enter comma-separated positions. Bits are numbered from left to right starting at 1.

Shift Direction

Steps to Generate Generate between 1 and 500 transitions.

Simulation Result

–

Enter an LFSR configuration and run the simulation.

Initial Seed –

Taps –

Direction –

Generated Steps –

Repeat Detected –

Detected Period –

Maximum Possible –

Output Bit Sequence –

Step	State	Output	Feedback	Next State
Run the simulator to generate states.

LFSR Analysis

What Is an LFSR?

A Linear Feedback Shift Register, or LFSR, is a shift register in which the next input bit is calculated from selected bits of the current register state. The selected bits are commonly called taps, and their values are combined using XOR.

After the feedback bit is calculated, the register shifts by one position and the feedback bit enters the register. Repeating this process produces a deterministic binary sequence.

Example 4-bit register:

Seed = 0001
Taps = 4,3
Direction = Right

Feedback = XOR of selected tap bits
Next state = feedback bit + shifted register

How to Use the LFSR Simulator

Enter a Seed

Enter the starting register state as a binary value. For example, 0001 creates a four-bit LFSR.

Choose Tap Positions

Enter the register positions whose bits should be XORed to produce the feedback bit.

Select Shift Direction

Choose whether the register moves toward the right or toward the left after each feedback calculation.

Generate the Sequence

Choose the number of transitions and run the simulator to inspect every state.

How LFSR Feedback Works

The feedback bit in this simulator is the XOR of the selected tap bits in the current register state.

If selected tap bits are:

1 and 0

Feedback:
1 XOR 0 = 1

If more than two taps are selected, XOR is applied successively across all selected bits.

1 XOR 0 XOR 1 = 0

Right-Shift LFSR

In right-shift mode, the rightmost bit is treated as the output bit. After calculating the feedback bit, the register shifts right and the feedback bit enters on the left.

Current:
abcd

Output:
d

Feedback:
f

Next state:
fabc

Left-Shift LFSR

In left-shift mode, the leftmost register bit is treated as the output. The register shifts left and the calculated feedback bit enters on the right.

Current:
abcd

Output:
a

Feedback:
f

Next state:
bcdf

LFSR Period and Cycle Length

Because an LFSR contains a finite number of states and evolves deterministically, it eventually enters a repeated state. Once a state repeats, the following sequence also repeats.

For an n-bit register, there are 2^n possible binary states. In the common XOR LFSR configuration, the all-zero state normally remains trapped at zero, so a maximal-length nonzero LFSR can have a period of:

Maximum nonzero period = 2^n – 1

For example, a four-bit maximal-length LFSR can have a period of 15 states.

Why the Tap Positions Matter

Not every set of taps produces a maximal-length sequence. Different feedback configurations can generate different cycle lengths even when the register width and seed are identical.

Maximal-length LFSRs are associated with primitive feedback polynomials over GF(2). When a suitable primitive configuration is used, every nonzero state can occur exactly once before the sequence repeats.

What Is the All-Zero LFSR State?

For the XOR feedback model used here, an all-zero register produces zero at every tapped position. XORing those zeros produces another zero, so the register remains in the zero state indefinitely.

0000
↓ 0000
↓ 0000
↓ 0000

For this reason, a nonzero seed is normally used when generating conventional LFSR sequences.

LFSR Applications

Pseudorandom Sequences

LFSRs can efficiently generate deterministic bit sequences that have useful pseudorandom-like properties.

Digital Communications

Feedback shift registers are used in scrambling, test patterns and sequence-generation systems.

Hardware Testing

LFSR sequences can be used to generate test patterns for digital circuits and built-in self-test systems.

CRC Concepts

Shift-register feedback structures are closely related to polynomial arithmetic used in cyclic redundancy checking.

LFSR vs Random Number Generator

An LFSR is deterministic. If you start with the same seed, taps and shift convention, it produces exactly the same sequence again.

This makes an LFSR useful for reproducible sequence generation, but a basic LFSR should not be treated as a cryptographically secure random-number generator.

Important LFSR Simulation Notes

Important: tap numbering in this simulator runs from left to right, beginning with position 1.

For right shift, the rightmost bit is displayed as the output bit and the feedback bit enters on the left.

For left shift, the leftmost bit is displayed as the output bit and the feedback bit enters on the right.

The feedback bit is calculated by XORing the selected tap positions before the register shifts.

Different LFSR references may use different tap numbering, polynomial notation, shift direction or feedback conventions. Always compare conventions when reproducing a published LFSR sequence.

An all-zero seed locks a conventional XOR LFSR in the zero state.

LFSR Simulator FAQs

What does LFSR stand for?

LFSR stands for Linear Feedback Shift Register.

What is an LFSR simulator?

An LFSR simulator calculates successive shift-register states from an initial seed and a selected XOR feedback configuration.

What is an LFSR seed?

The seed is the initial binary state stored in the shift register before sequence generation begins.

What are LFSR taps?

Taps identify the register bits used to calculate the feedback bit. This simulator XORs the selected tap values.

How are tap positions numbered here?

Positions are numbered from left to right beginning at 1. For a four-bit state ABCD, A is position 1 and D is position 4.

What is the LFSR period?

The period is the number of state transitions in a repeating cycle. A maximal-length n-bit nonzero LFSR can achieve a period of 2^n – 1 under the appropriate feedback configuration.

Why should I avoid an all-zero seed?

With XOR feedback, an all-zero register generates zero feedback and therefore remains in the zero state.

Does every tap combination produce the maximum period?

No. The achievable period depends on the feedback configuration. Only appropriate primitive configurations produce maximal-length sequences.

Can I simulate left and right shifts?

Yes. The calculator supports both directions and clearly shows the output bit, feedback bit and next register state for every transition.

Is an LFSR cryptographically secure?

A basic standalone LFSR is predictable from its structure and state, so it should not be used as a cryptographically secure random-number generator.