TMR Microcontroller Timer Utility

MCU Timer Prescaler Calculator

Calculate timer prescaler and auto-reload values for a target interrupt or overflow frequency. Inspect timer tick frequency, counter period, achieved frequency, timing error and maximum timer period.

✓ Prescaler ✓ ARR / TOP ✓ Timer Tick ✓ Interrupt Rate ✓ Period ✓ Error

PSC

Timer Prescaler & Reload

● Ready

Timer Input Clock (Hz) Clock actually supplied to the timer peripheral.

Target Timer Frequency (Hz) Desired update, overflow or periodic interrupt frequency.

Timer Counter Width Determines the maximum ARR/TOP counter value.

Maximum Prescaler Register Value For PSC-style timers, actual divider is normally PSC + 1.

Optimization Preference Used when multiple valid register combinations have similar accuracy.

Common timer formula: for MCU timers whose prescaler and reload registers are zero-based, Fout = Ftimer / ((PSC + 1) × (ARR + 1)). The calculator searches valid integer register combinations and reports the closest achievable target.

MCU Timer Calculation Result Calculated

Recommended Timer Registers —

Prescaler Register —

Prescaler Divider —

ARR / TOP Register —

Counter Counts —

Timer Tick Frequency —

Timer Tick Period —

Achieved Frequency —

Achieved Period —

Frequency Error —

Error PPM —

Maximum ARR —

Maximum Period —

Calculation Breakdown

—

What Is an MCU Timer Prescaler?

A hardware timer normally receives a peripheral clock that is much faster than the interval you want to measure. The prescaler divides that clock before it reaches the timer counter.

The counter then increments at the timer-tick frequency until it reaches a reload, TOP or auto-reload value.

MCU Timer Frequency Formula

A common timer architecture uses a zero-based prescaler and zero-based auto-reload register.

Ftimer_out =

Timer Clock
---------------------------------
(PSC + 1) × (ARR + 1)

This is common on STM32 timers and many similar timer peripherals, although exact register behavior should always be checked against the MCU reference manual.

Timer Tick Frequency

The prescaler first produces the timer counter clock:

Timer Tick Frequency =

Timer Input Clock
-----------------
Prescaler Divider

For a PSC register of 71 on a timer using PSC+1 semantics, the actual divider is 72.

72 MHz to 1 kHz Example

Timer Clock:
72 MHz

Choose:
PSC = 71

Divider:
72

Timer Tick:
72,000,000 / 72
= 1,000,000 Hz

Choose:
ARR = 999

Counts:
1000

Output:
1,000,000 / 1000
= 1000 Hz

The resulting timer period is 1 ms.

Why PSC and ARR Use +1

On a zero-based hardware counter, register value 0 still represents one timer clock interval. Therefore an ARR value of 999 gives 1000 counter states from 0 through 999.

ARR = 999

Counter sequence:
0 ... 999

Total counts:
1000

Therefore:
Counts = ARR + 1

Timer Counter Width

Counter Width	Maximum Register	Total Counts
8-bit	255	256
16-bit	65,535	65,536
24-bit	16,777,215	16,777,216
32-bit	4,294,967,295	4,294,967,296

Timer Period Formula

Period = 1 / Frequency

A 1 kHz timer update occurs every 1 millisecond, while a 100 Hz update occurs every 10 milliseconds.

Timer Resolution

Timer resolution is determined by the counter tick period after the prescaler. A smaller prescaler gives a faster tick and therefore finer timing resolution.

Timer Clock:
72 MHz

PSC = 71

Tick:
1 MHz

Tick Period:
1 µs

Frequency Error

Because both the prescaler and reload values are integers, not every requested frequency can be represented exactly.

Error =

Achieved Frequency - Target Frequency

The calculator searches integer combinations and reports the closest practical result within the selected register ranges.

Timer Error in PPM

Parts per million makes small relative timing errors easier to compare.

PPM Error =

(Achieved - Target)
-------------------
Target

× 1,000,000

Maximum Timer Period

The longest possible timer period occurs when both the prescaler and timer counter use their maximum supported divisions.

Maximum Period =

Maximum Prescaler Divider
×
Maximum Counter Counts
-------------------------
Timer Clock

STM32 Timer Clock Caution

On some STM32 clock trees, a timer peripheral can receive a clock that differs from the APB bus clock. In particular, the timer clock can be multiplied when the APB prescaler is greater than one.

Enter the actual timer peripheral clock into this calculator rather than assuming the CPU core clock and timer clock are identical.

Prescaler vs Auto-Reload

Different PSC and ARR combinations can produce the same output frequency. Using a smaller prescaler gives a higher timer tick frequency and finer counter resolution, while using a larger prescaler can reduce the required ARR value.

Timer Interrupt Frequency

If the timer generates an update interrupt each time the counter reloads, the update-event frequency calculated by this page is also the basic periodic interrupt frequency.

72 MHz timer
PSC = 71
ARR = 999

Update Event:
1000 Hz

Interrupt Period:
1 ms

PWM Frequency

For edge-aligned PWM on a simple up-counter, the PWM period often follows the same basic timer-update formula. However, center-aligned modes and special timer configurations can introduce additional factors.

This calculator therefore reports the base timer period rather than assuming every MCU PWM mode behaves identically.

MCU Timer Prescaler Calculator FAQs

How do I calculate a timer prescaler?

Choose a prescaler divider and counter count whose product is as close as possible to timer clock divided by the desired output frequency.

Why is PSC increased by one?

On many MCU timers the register is zero-based, so PSC=0 means divide by 1, PSC=1 means divide by 2, and so on.

Why is ARR increased by one?

A counter running from zero through ARR contains ARR+1 counter states.

What is timer tick frequency?

It is the timer input clock after the prescaler has divided it.

What is the timer period at 1 kHz?

One kilohertz corresponds to a period of 1 millisecond.

What is the maximum count of a 16-bit timer?

The maximum register value is 65,535, corresponding to 65,536 counter states in a zero-based counter.

Why does my timer frequency differ from the CPU clock calculation?

The timer peripheral can have a different clock source or clock-tree multiplier. Use the actual timer input clock.

Can multiple PSC and ARR values give the same frequency?

Yes. Their divider product can be identical even when the individual values differ.

Should I prefer a smaller prescaler?

A smaller prescaler normally gives finer counter resolution, provided the required ARR value fits within the timer width.

Can this be used for PWM calculations?

It can calculate the base timer frequency used by many PWM modes, but the exact PWM formula may differ for center-aligned or specialized hardware modes.

Calculate MCU Timer Prescaler and ARR Values

Find integer timer register values for periodic interrupts, overflow events, time bases and PWM timer clocks while checking achieved frequency, tick resolution and timing error.