Memory Bandwidth & Transfer Time Calculator
Calculate theoretical and effective memory bandwidth from clock frequency, transfer rate, bus width and efficiency, then estimate how long a selected amount of data takes to transfer across the memory interface.
| Metric | Value | Unit | Calculation |
|---|
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What Is a Memory Bandwidth Calculator?
A Memory Bandwidth Calculator estimates how much data a memory interface can transfer per second from its clock rate, transfers per cycle, bus width and number of channels.
It can also apply an efficiency factor to estimate usable bandwidth and calculate the theoretical time required to move a specified amount of data.
Memory Bandwidth Formula
For a base memory clock:
Theoretical Bandwidth
= Clock Frequency
× Transfers per Clock
× Bus Width in Bits
÷ 8
× Number of ChannelsDividing the bus width by eight converts bits per transfer into bytes per transfer.
Example: 1600 MHz DDR with a 64-Bit Bus
Clock = 1600 MHz
Transfers / Clock = 2
Bus Width = 64 bits
Channels = 1
Transfer Rate:
1600 MHz × 2
= 3200 MT/s
Bytes per Transfer:
64 / 8
= 8 bytes
Bandwidth:
3.2 billion transfers/s × 8 bytes
= 25.6 GB/sAt 80% effective efficiency:
25.6 GB/s × 0.80
= 20.48 GB/sDDR Clock vs Effective Transfer Rate
Double Data Rate memory transfers information on two clock transitions per base clock cycle. Therefore a 1600 MHz base clock with two transfers per clock corresponds to 3200 million transfers per second.
1600 MHz clock
× 2 transfers / clock
= 3200 MT/sBus Width and Bytes per Transfer
Memory interfaces are commonly described by their width in bits.
| Bus Width | Bytes per Transfer |
|---|---|
| 8 bits | 1 byte |
| 16 bits | 2 bytes |
| 32 bits | 4 bytes |
| 64 bits | 8 bytes |
| 128 bits | 16 bytes |
| 256 bits | 32 bytes |
| 512 bits | 64 bytes |
Multiple Memory Channels
If several independent memory channels can transfer data concurrently, their peak bandwidth can be added in the simplified theoretical model.
Single Channel:
25.6 GB/s
Dual Channel:
25.6 × 2
= 51.2 GB/s
Quad Channel:
25.6 × 4
= 102.4 GB/sReal application scaling can be lower because software access patterns and memory-controller behavior may prevent all channels from remaining fully utilized.
Effective Memory Bandwidth
Peak bandwidth describes the ideal data rate if the interface transfers useful data continuously. Real systems lose throughput because of command overhead, refresh, latency, direction changes, bank conflicts, page misses and workload behavior.
Effective Bandwidth
= Theoretical Bandwidth
× Efficiency / 100Memory Transfer Time Formula
Once effective bandwidth is known:
Transfer Time
= Data Size / Effective BandwidthFor example, transferring 1 GB through a sustained 20 GB/s interface would take approximately:
1 GB / 20 GB/s
= 0.05 seconds
= 50 msTheoretical Bandwidth vs Real Transfer Time
The transfer-time result is a throughput estimate. It does not automatically include initial memory latency, cache misses, DMA setup, PCIe transactions, software overhead or processing performed before or after the transfer.
For very small transfers, fixed latency can matter more than peak bandwidth. For large sequential transfers, sustained bandwidth usually becomes more important.
GB/s vs GiB/s
Memory bandwidth is frequently quoted using decimal gigabytes per second, where one GB is one billion bytes. Binary gibibytes per second use powers of 1024.
1 GB/s
= 1,000,000,000 bytes/s
1 GiB/s
= 1,073,741,824 bytes/sTherefore the same raw number of bytes per second produces a smaller numerical value when expressed in GiB/s.
What Is MT/s?
MT/s means millions of transfers per second. It describes transfer activity rather than the underlying oscillator frequency.
1600 MHz DDR
Base Clock:
1600 million cycles/s
Transfers per Cycle:
2
Effective Transfer Rate:
3200 MT/sMemory Bandwidth from MT/s
If the effective transfer rate is already known:
Bandwidth
= Transfers per Second
× Bus Width / 8
× ChannelsFor a 3200 MT/s, 64-bit single-channel interface:
3.2 × 10^9 transfers/s
× 8 bytes
= 25.6 × 10^9 bytes/s
= 25.6 GB/sMemory Clock Period
Clock period is the duration of one underlying clock cycle.
Clock Period
= 1 / Clock FrequencyAt 1600 MHz:
1 / 1.6 × 10^9
= 0.625 nsThe data interface can still transfer more than once during that cycle when using DDR or another multi-transfer scheme.
Memory Efficiency Example
Peak Bandwidth:
51.2 GB/s
Efficiency:
75%
Effective Bandwidth:
51.2 × 0.75
= 38.4 GB/sEfficiency is an estimate, not a fixed specification. Different workloads can achieve very different sustained memory throughput on identical hardware.
CPU Memory Bandwidth
A CPU memory system can contain multiple memory channels, each with its own data width. Theoretical bandwidth can be estimated from the channel speed and width, but actual CPU memory throughput also depends on the integrated memory controller, cache hierarchy, instruction workload, NUMA configuration and access pattern.
GPU Memory Bandwidth
Graphics processors often use much wider aggregate memory buses than ordinary desktop CPU memory channels. The same calculation principle applies: effective transfer rate multiplied by aggregate bus width gives peak byte throughput.
Example:
Effective Rate:
20 Gb/s per pin
Bus Width:
256 bits
Bandwidth:
20 × 10^9 × 256 / 8
= 640 GB/sWhen a vendor already specifies an effective per-pin data rate, that rate should be entered without applying an additional DDR multiplier.
Memory Bandwidth & Transfer Time Calculator FAQs
How do I calculate memory bandwidth?
How do I convert a 64-bit bus to bytes?
What is theoretical memory bandwidth?
What is effective memory bandwidth?
How do I calculate memory transfer time?
What does DDR mean in the calculator?
Should I multiply MT/s by two for DDR?
How does dual-channel memory affect bandwidth?
What is the difference between GB/s and GiB/s?
Does higher bandwidth mean lower latency?
Why is real memory bandwidth lower than theoretical bandwidth?
Does this calculator include cache performance?
Can it calculate GPU memory bandwidth?
Can it calculate transfer time for large files?
Calculate Memory Throughput and Transfer Time
Estimate theoretical and usable memory bandwidth, effective transfer rates and payload transfer times from clock speed, transfer factor, memory bus width, channel count and efficiency.