MMIO Embedded Register Utility

Memory-Mapped Register Calculator

Calculate an absolute memory-mapped register address from a peripheral base, register offset, array index and register stride, or decode a value from a specific register bitfield using exact masks, shifts and set/clear values.

✓ Base + Offset ✓ Register Arrays ✓ Bitfield Mask ✓ Field Extraction ✓ 64-Bit Addresses

REG

Address / Bitfield Calculator

● Ready

Peripheral / Block Base Address Start address of the peripheral or memory-mapped register block.

Array Index Use 0 for a normal non-array register.

Field LSB Lowest bit position of the bitfield.

Field Width Number of bits contained in the field.

Memory-mapped register math: absolute addresses are calculated in bytes. Register-array addressing uses Base + Offset + (Index × Stride). Bit numbering uses bit 0 as the least-significant bit. Always verify the actual register map, access width, reserved bits and read/write behavior in the device datasheet.

Memory-Mapped Register Result Calculated

Absolute Register Address —

Base Address —

Array Offset —

Absolute Address —

Decimal Address —

Index —

Stride —

Total Offset —

Item	Value	Hex	Binary / Calculation

Calculation Breakdown

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What Is a Memory-Mapped Register Calculator?

A Memory-Mapped Register Calculator converts a peripheral base address and a register offset into the absolute memory address used by software to access that hardware register.

It is useful when reading MCU reference manuals, SoC register maps, FPGA peripheral documentation, bare-metal firmware, kernel drivers and embedded debugger output.

Memory-Mapped Register Address Formula

For a normal register, the basic calculation is:

Absolute Register Address
= Peripheral Base Address
+ Register Offset

For a repeated register array, an index and byte stride are also included.

Address
= Base
+ Register Offset
+ (Array Index × Stride)

Example: Base Address + Register Offset

Peripheral Base:
0x40020000

Register Offset:
0x14

Array Index:
0

Absolute Address:
0x40020000 + 0x14

= 0x40020014

This is the address firmware would use when accessing that register, assuming the memory map and access width are correct.

Register Array Address Calculation

Many peripherals expose arrays of channels, timers, descriptors or data registers at a constant byte spacing.

Base:
0x40010000

Register Array Offset:
0x100

Index:
3

Stride:
0x4

Array Offset:
3 × 4
= 12
= 0xC

Register Address:
0x40010000 + 0x100 + 0xC

= 0x4001010C

What Is Register Stride?

Register 0 = Base + 0x00
Register 1 = Base + 0x04
Register 2 = Base + 0x08
Register 3 = Base + 0x0C

Stride = 4 bytes

Stride should come from the hardware register specification. It must not be assumed merely from the register’s logical data width.

Memory Address vs Register Width

A register address identifies where the register begins in the processor’s address space. Its width controls how many bits or bytes are accessed at that location.

Register Width	Bytes
8 bits	1 byte
16 bits	2 bytes
32 bits	4 bytes
64 bits	8 bytes

The access width, byte order and alignment requirements are architecture and peripheral dependent.

Memory-Mapped Register Bitfields

A single hardware register often contains multiple independent control or status fields. A bitfield is normally defined by its least-significant bit position and width.

Example field:

Bits:
4:2

LSB:
2

Width:
3

Register Bitfield Mask Formula

For a field with width W beginning at bit LSB:

Unshifted Field Mask:
(1 << Width) - 1

Shifted Register Mask:
((1 << Width) - 1) << LSB

For a three-bit field beginning at bit 2:

Width = 3
LSB = 2

Unshifted:
0b111

Shifted:
0b11100

Mask:
0x1C

Extract a Register Field

The field value is obtained by masking the register and shifting the result down to bit zero.

Field Value
= (Register Value & Field Mask) >> LSB

An equivalent expression is:

Field Value
= (Register Value >> LSB)
& ((1 << Width) - 1)

Bitfield Example: Register 0xB4, Bits 4:2

Register:
0xB4

Binary:
10110100

Field:
bits 4:2

Mask:
00011100
= 0x1C

Register & Mask:
0xB4 & 0x1C
= 0x14

Shift right 2:
0x14 >> 2
= 5

Extracted field:
5

Creating a Field Value for a Register

To position a new field value inside the register, mask the value to the field width and shift it left by the field's least-significant bit.

Positioned Field Value
= (Field Value & FieldValueMask)
<< LSB

This helps prevent high bits from a larger input value spilling into adjacent register fields.

Clearing a Register Field

To clear all bits belonging to a field while leaving unrelated bits unchanged:

Cleared Register
= Register Value & ~FieldMask

The complement should be limited to the actual register width when performing the calculation.

Setting All Bits in a Register Field

To set every bit belonging to a field:

Register With Field Set
= Register Value | FieldMask

For changing a field to a specific numerical value, the usual read-modify-write calculation combines clearing and insertion.

Read-Modify-Write Formula

NewRegister =
(Register & ~FieldMask)
|
((NewFieldValue << LSB) & FieldMask)

This preserves register bits outside the selected field. However, the formula must not be blindly used on registers with write-one-to-clear, write-only, read-sensitive or other special hardware semantics.

Reserved Register Bits

Hardware manuals frequently mark some bits as reserved. Firmware should follow the documented behavior for those bits. Depending on the device, reserved fields may need to remain zero, retain their previous state or be written with a specified value.

A mathematically valid mask does not prove that a hardware write is safe. Always follow the register-specific access rules in the MCU, SoC or peripheral reference manual.

Read-Only and Write-Only Registers

Memory-mapped address calculations do not determine whether a register can be read or written. Register access permissions are defined by the hardware. Common documentation labels include RO, WO, RW, W1C and several device-specific variations.

Write-One-to-Clear Registers

A write-one-to-clear field is a particularly important example where an ordinary read-modify-write sequence can be inappropriate. Writing a one clears the corresponding hardware status bit.

W1C field:

Write 1
→ clear status bit

Write 0
→ leave status unchanged

The register's documented semantics should therefore always take precedence over generic bit manipulation.

Register Address Alignment

Many processors and peripherals require naturally aligned accesses. For example, a 32-bit register commonly begins at an address divisible by four, although the exact requirement depends on the architecture.

Typical 32-bit aligned addresses:

0x40000000
0x40000004
0x40000008
0x4000000C

The calculator performs address arithmetic but does not assume that every resulting address is valid for every processor.

32-Bit vs 64-Bit Memory Maps

Some register maps fit completely inside a 32-bit address space, while other systems use wider physical or virtual addresses. This calculator uses integer arithmetic capable of retaining values beyond JavaScript's normal floating-point integer precision.

That allows addresses such as 0xFFFF000000001000 to be calculated without rounding them to a nearby number.

Memory-Mapped Register Calculator FAQs

What is a memory-mapped register?

A memory-mapped register is a hardware register exposed at an address in the processor's memory address space.

How do I calculate a peripheral register address?

Add the register offset to the peripheral base address. For an array, also add the array index multiplied by the register stride.

What is a register offset?

A register offset is the byte displacement of a register from the beginning of its peripheral or register block.

What is register stride?

Stride is the byte distance between repeated elements in a memory-mapped register array or structure.

How is an array register address calculated?

Use Base + Register Offset + (Index × Stride).

What is bit 0 in a register?

Bit 0 is the least-significant bit of the register value.

How do I calculate a register field mask?

For a field width W starting at LSB position L, use ((1 << W) - 1) << L.

How do I extract a bitfield from a register?

Mask the register with the field mask and then shift the result right by the field's LSB position.

How do I clear a bitfield?

Use Register & ~FieldMask, with the complement limited to the actual register width.

What is a read-modify-write operation?

It reads the existing register, modifies only selected bits and writes the result back while attempting to preserve unrelated bits.

Is read-modify-write always safe?

No. Registers with write-one-to-clear, read-sensitive, write-only or other special semantics may require a different access method.

Can this calculator handle 64-bit addresses?

Yes. The address calculation uses integer arithmetic that can safely represent 64-bit-style hexadecimal addresses.

Does register width equal register stride?

Not necessarily. A 32-bit register is four bytes wide, but its array stride can be larger when the register map includes padding or other fields.

Does the calculator know whether a register is read-only?

No. Access permissions and side effects must be taken from the hardware reference manual.

Calculate Register Addresses and Decode Bitfields

Convert base addresses, offsets, indexes and strides into exact memory-mapped register addresses, or inspect masks, bit positions and extracted values from 8-bit, 16-bit, 32-bit and 64-bit hardware registers.