Demultiplexer Simulator
Simulate a 1-to-2 demultiplexer and route one digital input toward one of two outputs using select input S. Test single-bit logic or multi-bit 4, 8 and 16-bit buses using binary, hexadecimal or unsigned decimal values.
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DEMUX
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Demultiplexer Simulator
The Demultiplexer Simulator models a standard 1-to-2 digital demultiplexer, commonly written as a 1:2 DEMUX. A demultiplexer accepts one data input and directs that signal toward one of several output paths according to a select input.
A 1-to-2 DEMUX contains one data input D, one select line S and two outputs called Y0 and Y1. When S is 0, input D is routed to Y0. When S is 1, D is routed to Y1.
This simulator handles the classic single-bit logic circuit as well as 4-bit, 8-bit and 16-bit buses. In bus mode, the complete data word is routed to the selected output while the other output becomes an all-zero word.
How a 1-to-2 Demultiplexer Works
The select line determines which output receives the input signal. The unselected output remains zero.
S = 0:
Y0 = D
Y1 = 0
S = 1:
Y0 = 0
Y1 = DThis is the reverse routing concept of a multiplexer, which selects one input and sends it toward one output.
1-to-2 Demultiplexer Truth Table
| Input D | Select S | Output Y0 | Output Y1 | Selected Path |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | D → Y0 |
| 1 | 0 | 1 | 0 | D → Y0 |
| 0 | 1 | 0 | 0 | D → Y1 |
| 1 | 1 | 0 | 1 | D → Y1 |
Demultiplexer Boolean Equations
The standard Boolean equations for a 1:2 demultiplexer are:
Y0 = D AND NOT S
Y1 = D AND SThe NOT S term enables Y0 only when S is zero. The direct S term enables Y1 only when S is one.
DEMUX Example with S = 0
D = 1
S = 0
NOT S = 1
Y0 = D AND NOT S
Y0 = 1 AND 1
Y0 = 1
Y1 = D AND S
Y1 = 1 AND 0
Y1 = 0
Output:
Y0 = 1
Y1 = 0DEMUX Example with S = 1
D = 1
S = 1
NOT S = 0
Y0 = 1 AND 0
Y0 = 0
Y1 = 1 AND 1
Y1 = 1
Output:
Y0 = 0
Y1 = 1What Happens When D = 0?
When the data input is zero, both outputs are zero regardless of the select input because routing a zero signal still produces zero at the selected output.
D = 0, S = 0:
Y0 = 0
Y1 = 0
D = 0, S = 1:
Y0 = 0
Y1 = 0The select line still determines the logical route, even though the observable output values are identical.
Why a 1-to-2 DEMUX Needs One Select Line
There are two possible output destinations, so one binary select bit is enough to identify either destination.
S = 0 → choose output 0
S = 1 → choose output 1
Possible destinations:
2¹ = 2A 1-to-4 demultiplexer normally requires two select lines because 2² equals four possible output destinations.
1-to-2 DEMUX Logic Gate Implementation
A basic 1:2 demultiplexer can be constructed from one NOT gate and two AND gates.
Step 1:
NOT S
Step 2:
Y0 = D AND NOT S
Step 3:
Y1 = D AND SOnly the selected AND path is enabled when D is one.
Demultiplexer Block Diagram
A demultiplexer is usually drawn with one input entering one side of the block and multiple outputs leaving the opposite side.
┌──── Y0
D ───── DEMUX
└──── Y1
↑
SThe simulator highlights the currently selected output path so the routing decision is easy to inspect.
Multi-Bit Demultiplexer
A bus demultiplexer applies the same routing decision to every bit of a multi-bit word. When one destination is selected, the complete bus is copied to that output while the other output is filled with zeros.
8-bit input:
D = 10101100
S = 0:
Y0 = 10101100
Y1 = 00000000
S = 1:
Y0 = 00000000
Y1 = 101011008-Bit Demultiplexer Example
D:
11001100
= 0xCC
= 204
S:
1
Y0:
00000000
= 0x00
= 0
Y1:
11001100
= 0xCC
= 204Because S is one, the entire input byte appears at Y1.
Hexadecimal DEMUX Simulation
Hexadecimal is convenient when routing wider buses because every hexadecimal digit represents four binary bits.
Width:
8 bits
D:
0xA5
S:
0
Output:
Y0 = 0xA5
Y1 = 0x00The underlying routing operation is the same as for binary input.
Decimal DEMUX Simulation
Unsigned decimal values can also represent a digital bus. The value is converted internally to the chosen fixed-width bit pattern before routing.
Width:
8 bits
D:
170
Binary:
10101010
S:
1
Y0:
0
Y1:
170Demultiplexer vs Multiplexer
| Device | Inputs | Outputs | Main Function |
|---|---|---|---|
| Multiplexer | Multiple data inputs | One output | Select one source |
| Demultiplexer | One data input | Multiple outputs | Select one destination |
A MUX concentrates several possible input paths into one output path. A DEMUX distributes one input toward one selected output.
1:2 DEMUX vs 1:4 DEMUX
| Demultiplexer | Data Inputs | Select Lines | Outputs |
|---|---|---|---|
| 1:2 DEMUX | 1 | 1 | 2 |
| 1:4 DEMUX | 1 | 2 | 4 |
| 1:8 DEMUX | 1 | 3 | 8 |
Each extra select bit doubles the number of uniquely addressable destinations.
Demultiplexer as a Data Distributor
A demultiplexer can act as a digital data distributor. One signal source can be routed to different destinations according to control signals.
Input D:
data stream
S = 0:
send data to destination Y0
S = 1:
send data to destination Y1In practical digital systems, the outputs may feed different functional blocks, registers or communication paths.
Demultiplexers in Digital Electronics
Demultiplexers are used in digital routing, address decoding, communication systems, memory selection, control circuits and data-distribution networks.
A control unit can use selection logic to decide which subsystem receives a data or enable signal. Wider versions can distribute entire binary words rather than single bits.
DEMUX in Communication Systems
The word demultiplexing is also used more broadly in communication systems where combined channels are separated into individual destinations. A simple digital logic DEMUX demonstrates the fundamental routing concept on a smaller scale.
One source
↓
selection logic
↓
chosen destinationDEMUX in Memory and Address Selection
Demultiplexer-like structures can route enable signals toward one selected memory location or hardware block. Select inputs act as an address that determines which output line becomes active.
1 select bit:
2 destinations
2 select bits:
4 destinations
3 select bits:
8 destinationsThis relationship is closely connected to binary decoding.
Demultiplexer vs Decoder
A decoder activates an output based on an encoded select input, while a demultiplexer additionally has a data input that is routed to the selected output.
| Feature | Demultiplexer | Decoder |
|---|---|---|
| Data input | Yes | Usually no separate data input |
| Select/address inputs | Yes | Yes |
| Multiple outputs | Yes | Yes |
| Main role | Route data | Decode address/code |
Common Demultiplexer Mistakes
A common mistake is reversing Y0 and Y1. In the convention used by this simulator, S=0 selects Y0 and S=1 selects Y1.
Another mistake is forgetting that the unselected output must be zero. The demultiplexer does not duplicate the data simultaneously to both outputs.
The equations must also use the complemented select signal on Y0: Y0 = D AND NOT S, while Y1 = D AND S.
Demultiplexer Simulator Limitations and Notes
This simulator models ideal combinational logic. It does not model propagation delay, output drive current, voltage thresholds, rise and fall times or unknown logic states.
The select line supports the binary values zero and one only. Multi-bit mode models several 1:2 demultiplexer channels operating in parallel under the same select signal.
Binary, hexadecimal and decimal inputs are simply different textual representations of the same fixed-width bus value.