1:2 DEMUX Digital Logic Simulator

Demultiplexer Simulator

Simulate a 1-to-2 demultiplexer and route one digital input toward one of two outputs using select input S. Test single-bit logic or multi-bit 4, 8 and 16-bit buses using binary, hexadecimal or unsigned decimal values.

✓ Input D ✓ Select S ✓ Y0 / Y1 Outputs ✓ Live Routing Path ✓ 1 / 4 / 8 / 16 Bit ✓ Truth Table
DEMUX
1-to-2 Demultiplexer Simulation
● Ready
Enter one binary input bit: 0 or 1.
DEMUX Configuration
1:2 DEMUX equations: Y0 = D AND NOT S and Y1 = D AND S. When S=0, D is routed to Y0 while Y1 is zero. When S=1, D is routed to Y1 while Y0 is zero.
Demultiplexer Outputs Y0 Selected
Output Routing
Select S
Active Output
Width
Input D
Y0 Binary
Y1 Binary
Y0 Hex
Y1 Hex
D = —
1:2
DEMUX
Y0 = —
Y1 = —
S = —
Boolean Equation Evaluation
Signal Routing Analysis

Demultiplexer Simulator

The Demultiplexer Simulator models a standard 1-to-2 digital demultiplexer, commonly written as a 1:2 DEMUX. A demultiplexer accepts one data input and directs that signal toward one of several output paths according to a select input.

A 1-to-2 DEMUX contains one data input D, one select line S and two outputs called Y0 and Y1. When S is 0, input D is routed to Y0. When S is 1, D is routed to Y1.

This simulator handles the classic single-bit logic circuit as well as 4-bit, 8-bit and 16-bit buses. In bus mode, the complete data word is routed to the selected output while the other output becomes an all-zero word.

How a 1-to-2 Demultiplexer Works

The select line determines which output receives the input signal. The unselected output remains zero.

S = 0: Y0 = D Y1 = 0 S = 1: Y0 = 0 Y1 = D

This is the reverse routing concept of a multiplexer, which selects one input and sends it toward one output.

1-to-2 Demultiplexer Truth Table

Input D Select S Output Y0 Output Y1 Selected Path
0 0 0 0 D → Y0
1 0 1 0 D → Y0
0 1 0 0 D → Y1
1 1 0 1 D → Y1

Demultiplexer Boolean Equations

The standard Boolean equations for a 1:2 demultiplexer are:

Y0 = D AND NOT S Y1 = D AND S

The NOT S term enables Y0 only when S is zero. The direct S term enables Y1 only when S is one.

DEMUX Example with S = 0

D = 1 S = 0 NOT S = 1 Y0 = D AND NOT S Y0 = 1 AND 1 Y0 = 1 Y1 = D AND S Y1 = 1 AND 0 Y1 = 0 Output: Y0 = 1 Y1 = 0

DEMUX Example with S = 1

D = 1 S = 1 NOT S = 0 Y0 = 1 AND 0 Y0 = 0 Y1 = 1 AND 1 Y1 = 1 Output: Y0 = 0 Y1 = 1

What Happens When D = 0?

When the data input is zero, both outputs are zero regardless of the select input because routing a zero signal still produces zero at the selected output.

D = 0, S = 0: Y0 = 0 Y1 = 0 D = 0, S = 1: Y0 = 0 Y1 = 0

The select line still determines the logical route, even though the observable output values are identical.

Why a 1-to-2 DEMUX Needs One Select Line

There are two possible output destinations, so one binary select bit is enough to identify either destination.

S = 0 → choose output 0 S = 1 → choose output 1 Possible destinations: 2¹ = 2

A 1-to-4 demultiplexer normally requires two select lines because 2² equals four possible output destinations.

1-to-2 DEMUX Logic Gate Implementation

A basic 1:2 demultiplexer can be constructed from one NOT gate and two AND gates.

Step 1: NOT S Step 2: Y0 = D AND NOT S Step 3: Y1 = D AND S

Only the selected AND path is enabled when D is one.

Demultiplexer Block Diagram

A demultiplexer is usually drawn with one input entering one side of the block and multiple outputs leaving the opposite side.

┌──── Y0 D ───── DEMUX └──── Y1 ↑ S

The simulator highlights the currently selected output path so the routing decision is easy to inspect.

Multi-Bit Demultiplexer

A bus demultiplexer applies the same routing decision to every bit of a multi-bit word. When one destination is selected, the complete bus is copied to that output while the other output is filled with zeros.

8-bit input: D = 10101100 S = 0: Y0 = 10101100 Y1 = 00000000 S = 1: Y0 = 00000000 Y1 = 10101100

8-Bit Demultiplexer Example

D: 11001100 = 0xCC = 204 S: 1 Y0: 00000000 = 0x00 = 0 Y1: 11001100 = 0xCC = 204

Because S is one, the entire input byte appears at Y1.

Hexadecimal DEMUX Simulation

Hexadecimal is convenient when routing wider buses because every hexadecimal digit represents four binary bits.

Width: 8 bits D: 0xA5 S: 0 Output: Y0 = 0xA5 Y1 = 0x00

The underlying routing operation is the same as for binary input.

Decimal DEMUX Simulation

Unsigned decimal values can also represent a digital bus. The value is converted internally to the chosen fixed-width bit pattern before routing.

Width: 8 bits D: 170 Binary: 10101010 S: 1 Y0: 0 Y1: 170

Demultiplexer vs Multiplexer

Device Inputs Outputs Main Function
Multiplexer Multiple data inputs One output Select one source
Demultiplexer One data input Multiple outputs Select one destination

A MUX concentrates several possible input paths into one output path. A DEMUX distributes one input toward one selected output.

1:2 DEMUX vs 1:4 DEMUX

Demultiplexer Data Inputs Select Lines Outputs
1:2 DEMUX 1 1 2
1:4 DEMUX 1 2 4
1:8 DEMUX 1 3 8

Each extra select bit doubles the number of uniquely addressable destinations.

Demultiplexer as a Data Distributor

A demultiplexer can act as a digital data distributor. One signal source can be routed to different destinations according to control signals.

Input D: data stream S = 0: send data to destination Y0 S = 1: send data to destination Y1

In practical digital systems, the outputs may feed different functional blocks, registers or communication paths.

Demultiplexers in Digital Electronics

Demultiplexers are used in digital routing, address decoding, communication systems, memory selection, control circuits and data-distribution networks.

A control unit can use selection logic to decide which subsystem receives a data or enable signal. Wider versions can distribute entire binary words rather than single bits.

DEMUX in Communication Systems

The word demultiplexing is also used more broadly in communication systems where combined channels are separated into individual destinations. A simple digital logic DEMUX demonstrates the fundamental routing concept on a smaller scale.

One source ↓ selection logic ↓ chosen destination

DEMUX in Memory and Address Selection

Demultiplexer-like structures can route enable signals toward one selected memory location or hardware block. Select inputs act as an address that determines which output line becomes active.

1 select bit: 2 destinations 2 select bits: 4 destinations 3 select bits: 8 destinations

This relationship is closely connected to binary decoding.

Demultiplexer vs Decoder

A decoder activates an output based on an encoded select input, while a demultiplexer additionally has a data input that is routed to the selected output.

Feature Demultiplexer Decoder
Data input Yes Usually no separate data input
Select/address inputs Yes Yes
Multiple outputs Yes Yes
Main role Route data Decode address/code

Common Demultiplexer Mistakes

A common mistake is reversing Y0 and Y1. In the convention used by this simulator, S=0 selects Y0 and S=1 selects Y1.

Another mistake is forgetting that the unselected output must be zero. The demultiplexer does not duplicate the data simultaneously to both outputs.

The equations must also use the complemented select signal on Y0: Y0 = D AND NOT S, while Y1 = D AND S.

Demultiplexer Simulator Limitations and Notes

This simulator models ideal combinational logic. It does not model propagation delay, output drive current, voltage thresholds, rise and fall times or unknown logic states.

The select line supports the binary values zero and one only. Multi-bit mode models several 1:2 demultiplexer channels operating in parallel under the same select signal.

Binary, hexadecimal and decimal inputs are simply different textual representations of the same fixed-width bus value.

Demultiplexer Simulator FAQs

What is a demultiplexer?
A demultiplexer is a digital circuit that routes one input signal toward one of several outputs according to one or more select lines.
What is a 1-to-2 DEMUX?
It has one data input, one select input and two output lines.
How many select lines does a 1:2 DEMUX need?
One select line is required because one binary bit can select between two outputs.
What happens when S = 0?
The input D is routed to Y0 and Y1 remains zero.
What happens when S = 1?
The input D is routed to Y1 and Y0 remains zero.
What are the Boolean equations for a 1:2 DEMUX?
Y0 = D AND NOT S and Y1 = D AND S.
If D=1 and S=0, what are the outputs?
Y0 equals 1 and Y1 equals 0.
If D=1 and S=1, what are the outputs?
Y0 equals 0 and Y1 equals 1.
If D=0, can any output become 1?
No. Both outputs remain zero because the input data itself is zero.
Can a DEMUX route a multi-bit bus?
Yes. Multiple single-bit demultiplexers can operate in parallel under one shared select line.
Does this simulator support hexadecimal input?
Yes. Hexadecimal input is supported for 4, 8 and 16-bit buses.
Can I use unsigned decimal input?
Yes, provided the decimal value fits within the selected bus width.
What is the difference between a MUX and DEMUX?
A MUX selects one of several inputs for one output. A DEMUX selects one of several destinations for one input.
What is the difference between a DEMUX and decoder?
A DEMUX has a data input that is routed, while a decoder mainly converts an encoded input into one active output line.
Does this simulator model propagation delay?
No. It models ideal Boolean routing only.
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