2:1 MUX Digital Logic Simulator

2-to-1 Multiplexer Simulator

Simulate a 2-to-1 multiplexer by setting data inputs I0 and I1 and the select input S. See which input is routed to output Y, inspect the Boolean equation and verify the result with the complete 2:1 MUX truth table.

✓ I0 / I1 Inputs ✓ Select Line S ✓ Live Output Y ✓ Truth Table ✓ Boolean Equation ✓ Signal Path View

MUX

2-to-1 Multiplexer Simulation

● Ready

Set Digital Inputs

Live Multiplexer Signal Path

2:1 MUX rule: When S = 0, output Y follows I0. When S = 1, output Y follows I1. The Boolean equation is Y = (NOT S AND I0) OR (S AND I1).

Multiplexer Output Calculated

Output Y — —

Input I0 —

Input I1 —

Select S —

Selected Input —

NOT S —

NOT S AND I0 —

S AND I1 —

Output Y —

S	I0	I1	Selected	Y

Boolean Equation Calculation —

Simulation Analysis —

2-to-1 Multiplexer Simulator

The 2-to-1 Multiplexer Simulator demonstrates how a basic digital multiplexer routes one of two input signals to a single output. A 2:1 MUX has two data inputs, normally labeled I0 and I1, one select line S and one output Y.

The select signal decides which data input reaches the output. When S is 0, I0 is selected. When S is 1, I1 is selected. The value of the unselected input does not affect the output.

This simulator lets you change all three input bits, inspect the active signal path, calculate the Boolean implementation and compare the current state with the complete multiplexer truth table.

How to Use the 2:1 Multiplexer Simulator

Set I0 and I1 to either 0 or 1, then choose the value of select input S. Press Simulate Multiplexer to calculate output Y.

I0 = 1
I1 = 0
S  = 0

S selects I0.

Therefore:

Y = I0
Y = 1

Changing S to 1 would select I1 instead and make Y equal to 0 for the same data inputs.

What Is a 2-to-1 Multiplexer?

A 2-to-1 multiplexer is a combinational digital circuit that chooses one of two data inputs and forwards that selected input to one output. Because two possible data sources exist, one select bit is sufficient to choose between them.

Inputs:
I0
I1

Select:
S

Output:
Y

S = 0 → Y = I0
S = 1 → Y = I1

2-to-1 Multiplexer Truth Table

Select S	I0	I1	Selected Input	Output Y
0	0	0	I0	0
0	0	1	I0	0
0	1	0	I0	1
0	1	1	I0	1
1	0	0	I1	0
1	0	1	I1	1
1	1	0	I1	0
1	1	1	I1	1

The table contains eight rows because there are three binary inputs: I0, I1 and S. Three Boolean inputs create 2³ = 8 possible combinations.

2:1 Multiplexer Boolean Equation

The standard Boolean equation for a 2-to-1 multiplexer is:

Y = (NOT S AND I0) OR (S AND I1)

The first AND term enables I0 only when S equals 0. The second AND term enables I1 only when S equals 1. OR then combines the two gated paths to produce output Y.

How the Boolean Equation Works

Example:

I0 = 1
I1 = 0
S  = 0

NOT S:
1

First term:
NOT S AND I0
1 AND 1
= 1

Second term:
S AND I1
0 AND 0
= 0

Output:
1 OR 0
= 1

When S = 0

If S is zero, NOT S becomes one. This enables the I0 branch and disables the I1 branch.

S = 0

Y = (1 AND I0) OR (0 AND I1)

Y = I0 OR 0

Y = I0

Therefore I1 becomes irrelevant whenever S equals 0.

When S = 1

If S is one, NOT S becomes zero. The I0 branch is disabled while the I1 branch becomes active.

S = 1

Y = (0 AND I0) OR (1 AND I1)

Y = 0 OR I1

Y = I1

Why Is It Called a 2-to-1 Multiplexer?

The name describes the data routing ratio. Two data inputs feed one output. The select input is a control signal rather than an additional data channel.

2 data inputs
      ↓
   2:1 MUX
      ↓
1 data output

2:1 MUX Select Line

A multiplexer with two data inputs needs one select bit because a single binary bit has exactly two possible states.

S = 0 → choose input 0
S = 1 → choose input 1

Larger multiplexers require more select bits. A 4-to-1 MUX requires two select lines because 2² = 4, while an 8-to-1 MUX requires three because 2³ = 8.

2-to-1 Multiplexer Using Logic Gates

A conventional 2:1 multiplexer can be constructed from one NOT gate, two AND gates and one OR gate.

Gate 1:
NOT S

Gate 2:
I0 AND NOT S

Gate 3:
I1 AND S

Gate 4:
OR the two AND outputs

Final:
Y = (NOT S AND I0) OR (S AND I1)

2:1 Multiplexer Example 1

I0 = 0
I1 = 1
S  = 0

Selected:
I0

Output:
Y = 0

2:1 Multiplexer Example 2

I0 = 0
I1 = 1
S  = 1

Selected:
I1

Output:
Y = 1

What Happens When Both Inputs Are Equal?

If I0 and I1 have the same value, changing the select line does not change the output because both possible data paths contain the same bit.

I0 = 1
I1 = 1

S = 0 → Y = 1
S = 1 → Y = 1

Likewise:

I0 = 0
I1 = 0

S = 0 → Y = 0
S = 1 → Y = 0

Multiplexer vs Demultiplexer

Device	Purpose	Typical Direction
Multiplexer	Select one input	Many inputs → one output
Demultiplexer	Route one input	One input → many outputs

A MUX chooses which source reaches an output, while a DEMUX chooses which destination receives an input.

Multiplexer vs Logic Gate

A basic gate such as AND or OR performs a Boolean function on its inputs. A multiplexer primarily performs signal selection. However, a MUX can also implement Boolean functions by wiring constants or variables to its data inputs.

Example:

I0 = 0
I1 = 1

Then:

S = 0 → Y = 0
S = 1 → Y = 1

Therefore:

Y = S

Using a 2:1 MUX as a NOT Function

A 2-to-1 multiplexer can implement inversion by connecting I0 to 1 and I1 to 0 while using the variable as the select input.

I0 = 1
I1 = 0
S  = A

A = 0 → Y = 1
A = 1 → Y = 0

Therefore:

Y = NOT A

Using a 2:1 MUX to Implement AND

Let:
S = A

I0 = 0
I1 = B

If A = 0:
Y = I0 = 0

If A = 1:
Y = I1 = B

Therefore:

Y = A AND B

This illustrates why multiplexers are useful not only for routing but also for implementing general combinational logic.

Using a 2:1 MUX to Implement OR

Let:
S = A

I0 = B
I1 = 1

If A = 0:
Y = B

If A = 1:
Y = 1

Therefore:

Y = A OR B

Applications of 2-to-1 Multiplexers

2:1 multiplexers appear throughout digital electronics and computer architecture. They are used wherever a circuit must select between two possible data sources.

Examples include processor datapaths, ALUs, register selection, memory interfaces, communication routing, control logic, bus switching, FPGA logic, digital signal processing and conditional data paths.

Common use cases

A processor may use a multiplexer to choose between a register value and an immediate constant. An arithmetic circuit may choose between two operands. A communication circuit may choose which signal source is sent to a shared output line.

2:1 Multiplexer in Verilog

A 2-to-1 multiplexer is commonly represented in hardware description languages with a conditional selection expression.

Conceptual Verilog:

assign Y = S ? I1 : I0;

This means that if S is one, Y receives I1; otherwise Y receives I0. The resulting logic implements the same truth table as the simulator.

2:1 Multiplexer in VHDL

Conceptual VHDL:

Y <= I0 when S = '0' else I1;

Again, the description implements the same basic selection behavior.

Common 2:1 Multiplexer Mistakes

A common mistake is reversing I0 and I1. In the standard convention used by this simulator, S=0 selects I0 and S=1 selects I1.

Another mistake is treating the select line as another data input. S controls which data signal is passed; it does not normally become the output directly unless the data inputs are wired specifically to implement that function.

It is also easy to write the Boolean equation incorrectly. The I0 path must use NOT S, while the I1 path uses S directly.

2-to-1 Multiplexer Simulator Limitations and Notes

This simulator models ideal Boolean logic with input values 0 and 1. It does not model propagation delay, voltage levels, high-impedance states, unknown X states or physical transistor behavior.

The simulator uses the standard active-high select convention: S=0 selects I0 and S=1 selects I1.

For circuit timing and hardware implementation, actual devices may have setup times, propagation delays, loading limits and electrical characteristics that are outside the scope of this Boolean simulator.

2-to-1 Multiplexer Simulator FAQs

What is a 2-to-1 multiplexer?

A 2-to-1 multiplexer is a digital circuit that selects one of two data inputs and routes the selected value to one output.

How many inputs does a 2:1 MUX have?

It has two data inputs, one select input and one output.

What does S do in a multiplexer?

S is the select line. It determines which data input is connected logically to the output.

Which input is selected when S=0?

S=0 selects I0.

Which input is selected when S=1?

S=1 selects I1.

What is the Boolean equation for a 2:1 MUX?

Y = (NOT S AND I0) OR (S AND I1).

How many truth-table rows does a 2:1 MUX have?

There are eight rows because I0, I1 and S provide three binary inputs.

What happens if I0 and I1 are both 1?

Y remains 1 regardless of the select input.

What happens if I0 and I1 are both 0?

Y remains 0 regardless of S.

Can a 2:1 MUX implement logic functions?

Yes. By connecting variables or constants to the data inputs, a 2:1 MUX can implement functions such as NOT, AND and OR.

What gates are needed to build a 2:1 MUX?

A standard gate-level implementation uses one NOT gate, two AND gates and one OR gate.

Is a multiplexer combinational logic?

Yes. An ideal multiplexer output depends only on its current inputs and does not store state.

Is a MUX the same as a DEMUX?

No. A multiplexer selects one of multiple inputs for one output, while a demultiplexer routes one input toward one of multiple outputs.

Why is one select line enough for a 2:1 MUX?

One binary select line has two possible states, 0 and 1, which are enough to choose between two inputs.

Does this simulator include propagation delay?

No. It models ideal Boolean behavior rather than physical timing.